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Searched refs:CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h1150 #define CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT 0x11 macro
H A Dgfx_8_1_sh_mask.h1992 #define CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT 0x11 macro
H A Dgfx_8_0_sh_mask.h1468 #define CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT 0x11 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10757 #define CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_9_1_sh_mask.h12234 #define CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h12038 #define CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h2054 #define CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h11992 #define CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h15176 #define CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h11660 #define CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h17670 #define CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h17331 #define CP_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro