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Searched refs:CP_INT_CNTL_RING2__OPCODE_ERROR_INT_ENABLE_MASK (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2422 #define CP_INT_CNTL_RING2__OPCODE_ERROR_INT_ENABLE_MASK 0x01000000L macro
H A Dgfx_7_2_sh_mask.h1231 #define CP_INT_CNTL_RING2__OPCODE_ERROR_INT_ENABLE_MASK 0x1000000 macro
H A Dgfx_8_1_sh_mask.h2095 #define CP_INT_CNTL_RING2__OPCODE_ERROR_INT_ENABLE_MASK 0x1000000 macro
H A Dgfx_8_0_sh_mask.h1571 #define CP_INT_CNTL_RING2__OPCODE_ERROR_INT_ENABLE_MASK 0x1000000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11077 #define CP_INT_CNTL_RING2__OPCODE_ERROR_INT_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h12554 #define CP_INT_CNTL_RING2__OPCODE_ERROR_INT_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h12358 #define CP_INT_CNTL_RING2__OPCODE_ERROR_INT_ENABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h2374 #define CP_INT_CNTL_RING2__OPCODE_ERROR_INT_ENABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h18022 #define CP_INT_CNTL_RING2__OPCODE_ERROR_INT_ENABLE_MASK … macro