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Searched refs:CP_INT_CNTL_RING2__GENERIC0_INT_ENABLE_MASK (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h1241 #define CP_INT_CNTL_RING2__GENERIC0_INT_ENABLE_MASK 0x80000000 macro
H A Dgfx_8_1_sh_mask.h2105 #define CP_INT_CNTL_RING2__GENERIC0_INT_ENABLE_MASK 0x80000000 macro
H A Dgfx_8_0_sh_mask.h1581 #define CP_INT_CNTL_RING2__GENERIC0_INT_ENABLE_MASK 0x80000000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11082 #define CP_INT_CNTL_RING2__GENERIC0_INT_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h12559 #define CP_INT_CNTL_RING2__GENERIC0_INT_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h12363 #define CP_INT_CNTL_RING2__GENERIC0_INT_ENABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h2379 #define CP_INT_CNTL_RING2__GENERIC0_INT_ENABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h18027 #define CP_INT_CNTL_RING2__GENERIC0_INT_ENABLE_MASK … macro