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Searched refs:CP_INT_CNTL_RING2__CNTX_BUSY_INT_ENABLE_MASK (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2410 #define CP_INT_CNTL_RING2__CNTX_BUSY_INT_ENABLE_MASK 0x00080000L macro
H A Dgfx_7_2_sh_mask.h1223 #define CP_INT_CNTL_RING2__CNTX_BUSY_INT_ENABLE_MASK 0x80000 macro
H A Dgfx_8_1_sh_mask.h2085 #define CP_INT_CNTL_RING2__CNTX_BUSY_INT_ENABLE_MASK 0x80000 macro
H A Dgfx_8_0_sh_mask.h1561 #define CP_INT_CNTL_RING2__CNTX_BUSY_INT_ENABLE_MASK 0x80000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11072 #define CP_INT_CNTL_RING2__CNTX_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h12549 #define CP_INT_CNTL_RING2__CNTX_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h12353 #define CP_INT_CNTL_RING2__CNTX_BUSY_INT_ENABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h2369 #define CP_INT_CNTL_RING2__CNTX_BUSY_INT_ENABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h18017 #define CP_INT_CNTL_RING2__CNTX_BUSY_INT_ENABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h16281 #define CP_INT_CNTL_RING2__CNTX_BUSY_INT_ENABLE_MASK … macro