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Searched refs:CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3398 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT 0x1e macro
H A Dgfx_8_1_sh_mask.h4542 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT 0x1e macro
H A Dgfx_8_0_sh_mask.h4020 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT 0x1e macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12957 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT macro
H A Dgc_9_1_sh_mask.h14257 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT macro
H A Dgc_9_2_1_sh_mask.h14122 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT macro
H A Dgc_9_4_3_sh_mask.h16489 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT macro
H A Dgc_9_4_2_sh_mask.h4055 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT macro
H A Dgc_11_5_0_sh_mask.h14131 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT macro
H A Dgc_11_0_0_sh_mask.h17437 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT macro
H A Dgc_12_0_0_sh_mask.h13334 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT macro
H A Dgc_10_1_0_sh_mask.h20371 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT macro
H A Dgc_11_0_3_sh_mask.h19678 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT macro
H A Dgc_10_3_0_sh_mask.h18524 #define CP_HQD_IQ_TIMER__PROCESSING_IQ__SHIFT macro