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Searched refs:CP_HQD_EOP_CONTROL__PROCESSING_EOP_MASK (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h4625 #define CP_HQD_EOP_CONTROL__PROCESSING_EOP_MASK 0x100 macro
H A Dgfx_8_0_sh_mask.h4103 #define CP_HQD_EOP_CONTROL__PROCESSING_EOP_MASK 0x100 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13091 #define CP_HQD_EOP_CONTROL__PROCESSING_EOP_MASK … macro
H A Dgc_9_1_sh_mask.h14391 #define CP_HQD_EOP_CONTROL__PROCESSING_EOP_MASK … macro
H A Dgc_9_2_1_sh_mask.h14256 #define CP_HQD_EOP_CONTROL__PROCESSING_EOP_MASK … macro
H A Dgc_9_4_2_sh_mask.h4189 #define CP_HQD_EOP_CONTROL__PROCESSING_EOP_MASK … macro
H A Dgc_11_5_0_sh_mask.h14327 #define CP_HQD_EOP_CONTROL__PROCESSING_EOP_MASK … macro
H A Dgc_11_0_0_sh_mask.h17633 #define CP_HQD_EOP_CONTROL__PROCESSING_EOP_MASK … macro
H A Dgc_12_0_0_sh_mask.h13519 #define CP_HQD_EOP_CONTROL__PROCESSING_EOP_MASK … macro
H A Dgc_10_1_0_sh_mask.h20513 #define CP_HQD_EOP_CONTROL__PROCESSING_EOP_MASK … macro
H A Dgc_11_0_3_sh_mask.h19878 #define CP_HQD_EOP_CONTROL__PROCESSING_EOP_MASK … macro