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Searched refs:CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h4637 #define CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK 0x1000000 macro
H A Dgfx_8_0_sh_mask.h4115 #define CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK 0x1000000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13098 #define CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_9_1_sh_mask.h14398 #define CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_9_2_1_sh_mask.h14263 #define CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_9_4_3_sh_mask.h16630 #define CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_9_4_2_sh_mask.h4196 #define CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_11_5_0_sh_mask.h14334 #define CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_11_0_0_sh_mask.h17640 #define CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_12_0_0_sh_mask.h13526 #define CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_10_1_0_sh_mask.h20520 #define CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_11_0_3_sh_mask.h19885 #define CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK … macro
H A Dgc_10_3_0_sh_mask.h18673 #define CP_HQD_EOP_CONTROL__CACHE_POLICY_MASK … macro