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Searched refs:CP_HPD_STATUS0__MAPPED_QUEUE__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h4402 #define CP_HPD_STATUS0__MAPPED_QUEUE__SHIFT 0x5 macro
H A Dgfx_8_0_sh_mask.h3880 #define CP_HPD_STATUS0__MAPPED_QUEUE__SHIFT 0x5 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12765 #define CP_HPD_STATUS0__MAPPED_QUEUE__SHIFT … macro
H A Dgc_9_1_sh_mask.h14065 #define CP_HPD_STATUS0__MAPPED_QUEUE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h13930 #define CP_HPD_STATUS0__MAPPED_QUEUE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h3861 #define CP_HPD_STATUS0__MAPPED_QUEUE__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h20794 #define CP_HPD_STATUS0__MAPPED_QUEUE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h24754 #define CP_HPD_STATUS0__MAPPED_QUEUE__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h14221 #define CP_HPD_STATUS0__MAPPED_QUEUE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h20166 #define CP_HPD_STATUS0__MAPPED_QUEUE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h27193 #define CP_HPD_STATUS0__MAPPED_QUEUE__SHIFT … macro