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Searched refs:CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2731 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK 0x6000000 macro
H A Dgfx_8_1_sh_mask.h3825 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK 0x2000000 macro
H A Dgfx_8_0_sh_mask.h3303 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK 0x2000000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19424 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK … macro
H A Dgc_9_1_sh_mask.h20731 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK … macro
H A Dgc_9_2_1_sh_mask.h20658 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK … macro
H A Dgc_9_4_2_sh_mask.h12885 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK … macro
H A Dgc_11_5_0_sh_mask.h22827 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK … macro
H A Dgc_11_0_0_sh_mask.h26815 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK … macro
H A Dgc_12_0_0_sh_mask.h14646 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK … macro
H A Dgc_10_1_0_sh_mask.h27336 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK … macro
H A Dgc_11_0_3_sh_mask.h29315 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK … macro
H A Dgc_10_3_0_sh_mask.h25597 #define CP_DMA_PFP_CONTROL__DST_CACHE_POLICY_MASK … macro