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Searched refs:CP_DMA_CNTL__PIO_FIFO_FULL_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2192 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK 0x20000000L macro
H A Dgfx_7_2_sh_mask.h2761 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK 0x20000000 macro
H A Dgfx_8_1_sh_mask.h3853 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK 0x20000000 macro
H A Dgfx_8_0_sh_mask.h3331 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK 0x20000000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19546 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK macro
H A Dgc_9_1_sh_mask.h20853 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK macro
H A Dgc_9_2_1_sh_mask.h20780 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK macro
H A Dgc_9_4_3_sh_mask.h22908 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK macro
H A Dgc_9_4_2_sh_mask.h13007 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK macro
H A Dgc_11_5_0_sh_mask.h22916 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK macro
H A Dgc_11_0_0_sh_mask.h26904 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK macro
H A Dgc_12_0_0_sh_mask.h14732 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK macro
H A Dgc_10_1_0_sh_mask.h27465 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK macro
H A Dgc_11_0_3_sh_mask.h29404 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK macro
H A Dgc_10_3_0_sh_mask.h25726 #define CP_DMA_CNTL__PIO_FIFO_FULL_MASK macro