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Searched refs:CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2121 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK 0x200 macro
H A Dgfx_8_1_sh_mask.h3165 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK 0x200 macro
H A Dgfx_8_0_sh_mask.h2643 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK 0x200 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h724 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_9_1_sh_mask.h623 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_9_2_1_sh_mask.h612 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_9_4_3_sh_mask.h653 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_9_4_2_sh_mask.h1242 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_11_5_0_sh_mask.h3266 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_11_0_0_sh_mask.h6110 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_12_0_0_sh_mask.h6545 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_10_1_0_sh_mask.h6167 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_11_0_3_sh_mask.h6885 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK … macro
H A Dgc_10_3_0_sh_mask.h6420 #define CP_CPF_STATUS__ROQ_CE_RING_BUSY_MASK … macro