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Searched refs:CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2053 #define CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK 0x400000 macro
H A Dgfx_8_1_sh_mask.h3107 #define CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK 0x400000 macro
H A Dgfx_8_0_sh_mask.h2585 #define CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK 0x400000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h658 #define CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK … macro
H A Dgc_9_1_sh_mask.h557 #define CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK … macro
H A Dgc_9_2_1_sh_mask.h546 #define CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK … macro
H A Dgc_9_4_2_sh_mask.h1176 #define CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK … macro
H A Dgc_11_5_0_sh_mask.h3189 #define CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK … macro
H A Dgc_11_0_0_sh_mask.h6033 #define CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK … macro
H A Dgc_12_0_0_sh_mask.h6469 #define CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK … macro
H A Dgc_10_1_0_sh_mask.h6092 #define CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK … macro
H A Dgc_11_0_3_sh_mask.h6808 #define CP_CPC_BUSY_STAT__MEC2_IB_QUEUE_BUSY_MASK … macro