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Searched refs:CP_CE_ROQ_RB_STAT__CEQ_WPTR_PRIMARY__SHIFT (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3202 #define CP_CE_ROQ_RB_STAT__CEQ_WPTR_PRIMARY__SHIFT 0x10 macro
H A Dgfx_8_1_sh_mask.h4338 #define CP_CE_ROQ_RB_STAT__CEQ_WPTR_PRIMARY__SHIFT 0x10 macro
H A Dgfx_8_0_sh_mask.h3816 #define CP_CE_ROQ_RB_STAT__CEQ_WPTR_PRIMARY__SHIFT 0x10 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1316 #define CP_CE_ROQ_RB_STAT__CEQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_9_1_sh_mask.h1215 #define CP_CE_ROQ_RB_STAT__CEQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h1182 #define CP_CE_ROQ_RB_STAT__CEQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h1815 #define CP_CE_ROQ_RB_STAT__CEQ_WPTR_PRIMARY__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h6802 #define CP_CE_ROQ_RB_STAT__CEQ_WPTR_PRIMARY__SHIFT … macro