Searched refs:CPT_AF_LFX_CTL (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | rvu_cpt.c | 499 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val); in rvu_mbox_handler_cpt_lf_alloc()
567 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf)); in cpt_inline_ipsec_cfg_inbound()
587 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val); in cpt_inline_ipsec_cfg_inbound()
622 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf)); in cpt_inline_ipsec_cfg_outbound()
640 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val); in cpt_inline_ipsec_cfg_outbound()
651 val = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf)); in cpt_inline_ipsec_cfg_outbound()
653 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), val); in cpt_inline_ipsec_cfg_outbound()
709 if ((offset & 0xFF000) == CPT_AF_LFX_CTL(0) || in validate_and_update_reg_offset()
969 ctl = rvu_read64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf)); in rvu_mbox_handler_cpt_lf_reset()
977 rvu_write64(rvu, blkaddr, CPT_AF_LFX_CTL(cptlf), ctl); in rvu_mbox_handler_cpt_lf_reset()
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| H A D | rvu_reg.h | 511 #define CPT_AF_LFX_CTL(a) (0x27000ull | (u64)(a) << 3) macro
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