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Searched refs:CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dnbio_v7_2.c245 CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK | in nbio_v7_2_update_medium_grain_clock_gating()
252 CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK | in nbio_v7_2_update_medium_grain_clock_gating()
H A Dnbio_v6_1.c176 CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK | in nbio_v6_1_update_medium_grain_clock_gating()
184 CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK | in nbio_v6_1_update_medium_grain_clock_gating()
H A Dnbio_v2_3.c243 CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK | in nbio_v2_3_update_medium_grain_clock_gating()
250 CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK | in nbio_v2_3_update_medium_grain_clock_gating()
H A Dnbio_v4_3.c253 CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK | in nbio_v4_3_update_medium_grain_clock_gating()
260 CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK | in nbio_v4_3_update_medium_grain_clock_gating()
/linux/drivers/gpu/drm/amd/include/asic_reg/pcie/
H A Dpcie_6_1_0_sh_mask.h3683 #define CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_5_0_sh_mask.h3679 #define CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK 0x80 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h44512 #define CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK … macro
H A Dnbio_4_3_0_sh_mask.h33937 #define CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK … macro
H A Dnbio_7_0_sh_mask.h75297 #define CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK … macro
H A Dnbio_2_3_sh_mask.h56033 #define CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK … macro
H A Dnbio_6_1_sh_mask.h39861 #define CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK … macro
H A Dnbio_7_2_0_sh_mask.h101569 #define CPM_CONTROL__TXCLK_PRBS_GATE_ENABLE_MASK … macro