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Searched refs:CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h1494 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT 0x11 macro
H A Dgfx_8_1_sh_mask.h2450 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT 0x11 macro
H A Dgfx_8_0_sh_mask.h1928 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT 0x11 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11878 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_9_1_sh_mask.h13304 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h13082 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h3280 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h13009 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h16315 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h12385 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h18858 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h18558 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h17206 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE__SHIFT … macro