Home
last modified time | relevance | path

Searched refs:CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h1493 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK 0x20000 macro
H A Dgfx_8_1_sh_mask.h2449 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK 0x20000 macro
H A Dgfx_8_0_sh_mask.h1927 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK 0x20000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11891 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK macro
H A Dgc_9_1_sh_mask.h13317 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK macro
H A Dgc_9_2_1_sh_mask.h13095 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK macro
H A Dgc_9_4_2_sh_mask.h3293 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK macro
H A Dgc_11_5_0_sh_mask.h13022 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK macro
H A Dgc_11_0_0_sh_mask.h16328 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK macro
H A Dgc_12_0_0_sh_mask.h12398 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK macro
H A Dgc_10_1_0_sh_mask.h18871 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK macro
H A Dgc_11_0_3_sh_mask.h18571 #define CPC_INT_CNTL__WRM_POLL_TIMEOUT_INT_ENABLE_MASK macro