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Searched refs:COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h7459 #define COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK 0x40 macro
H A Dgfx_8_1_sh_mask.h8801 #define COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK 0x40 macro
H A Dgfx_8_0_sh_mask.h8247 #define COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK 0x40 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10212 #define COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK … macro
H A Dgc_9_1_sh_mask.h11693 #define COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK … macro
H A Dgc_9_2_1_sh_mask.h11490 #define COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK … macro
H A Dgc_9_4_2_sh_mask.h24185 #define COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK … macro
H A Dgc_11_5_0_sh_mask.h11406 #define COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK … macro
H A Dgc_11_0_0_sh_mask.h14591 #define COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK … macro
H A Dgc_12_0_0_sh_mask.h7374 #define COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK … macro
H A Dgc_10_1_0_sh_mask.h17077 #define COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK … macro
H A Dgc_11_0_3_sh_mask.h16739 #define COMPUTE_DISPATCH_INITIATOR__ORDER_MODE_MASK … macro