Home
last modified time | relevance | path

Searched refs:CNVC_BYPASS (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_ipp.h81 IPP_SF(CNVC_CFG0_FORMAT_CONTROL, CNVC_BYPASS, mask_sh), \
148 type CNVC_BYPASS; \
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn401/
H A Ddcn401_dpp_cm.c101 CNVC_BYPASS, 0, in dpp401_full_bypass()
H A Ddcn401_dpp.c76 CNVC_BYPASS, 0, in dpp401_dpp_setup()
H A Ddcn401_dpp.h142 TF_SF(CNVC_CFG0_FORMAT_CONTROL, CNVC_BYPASS, mask_sh), \
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn10/
H A Ddcn10_dpp.c308 CNVC_BYPASS, 0, in dpp1_cnv_setup()
314 CNVC_BYPASS, 0, in dpp1_cnv_setup()
H A Ddcn10_dpp_cm.c781 CNVC_BYPASS, 0, in dpp1_full_bypass()
H A Ddcn10_dpp.h325 TF_SF(CNVC_CFG0_FORMAT_CONTROL, CNVC_BYPASS, mask_sh), \
1072 type CNVC_BYPASS; \
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn201/
H A Ddcn201_dpp.c61 CNVC_BYPASS, 0, in dpp201_cnv_setup()
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn20/
H A Ddcn20_dpp.c116 CNVC_BYPASS, 0, in dpp2_cnv_setup()
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn30/
H A Ddcn30_dpp.c226 CNVC_BYPASS, 0, in dpp3_cnv_setup()
/linux/drivers/gpu/drm/amd/include/
H A Dnavi10_enum.h504 typedef enum CNVC_BYPASS { enum
507 } CNVC_BYPASS; typedef
H A Dsoc21_enum.h555 typedef enum CNVC_BYPASS { enum
558 } CNVC_BYPASS; typedef