Searched refs:CN6XXX_BAR1_REG (Results 1 – 3 of 3) sorted by relevance
/linux/drivers/net/ethernet/cavium/liquidio/ |
H A D | cn66xx_device.c | 420 bar1 = lio_pci_readq(oct, CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_setup() 422 CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_setup() 423 bar1 = lio_pci_readq(oct, CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_setup() 431 CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_setup() 433 bar1 = lio_pci_readq(oct, CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_setup() 440 lio_pci_writeq(oct, mask, CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_write() 445 return (u32)lio_pci_readq(oct, CN6XXX_BAR1_REG(idx, oct->pcie_port)); in lio_cn6xxx_bar1_idx_read()
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H A D | cn66xx_regs.h | 455 #define CN6XXX_BAR1_REG(idx, port) \ macro
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H A D | lio_ethtool.c | 2976 reg = lio_pci_readq(oct, CN6XXX_BAR1_REG(i, oct->pcie_port)); in cn6xxx_read_csr_reg() 2978 CN6XXX_BAR1_REG(i, oct->pcie_port), i, reg); in cn6xxx_read_csr_reg()
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