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Searched refs:CMN_REFCLK_DIG_DIV (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/phy/ti/
H A Dphy-j721e-wiz.c76 CMN_REFCLK_DIG_DIV, enumerator
554 wiz->div_sel_field[CMN_REFCLK_DIG_DIV] = in wiz_regfield_init()
556 if (IS_ERR(wiz->div_sel_field[CMN_REFCLK_DIG_DIV])) { in wiz_regfield_init()
558 return PTR_ERR(wiz->div_sel_field[CMN_REFCLK_DIG_DIV]); in wiz_regfield_init()
1094 regmap_field_write(wiz->div_sel_field[CMN_REFCLK_DIG_DIV], 0x2); in wiz_clock_init()
1097 regmap_field_write(wiz->div_sel_field[CMN_REFCLK_DIG_DIV], 0x3); in wiz_clock_init()
1100 regmap_field_write(wiz->div_sel_field[CMN_REFCLK_DIG_DIV], 0); in wiz_clock_init()
/linux/drivers/phy/cadence/
H A Dphy-cadence-sierra.c237 CMN_REFCLK_DIG_DIV, enumerator
557 clk_set_rate(phy->input_clks[CMN_REFCLK_DIG_DIV], 25000000); in cdns_sierra_phy_init()
1163 sp->input_clks[CMN_REFCLK_DIG_DIV] = clk; in cdns_sierra_phy_get_clocks()
1263 clk_set_rate(sp->input_clks[CMN_REFCLK_DIG_DIV], 25000000); in cdns_sierra_phy_configure_multilink()