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Searched refs:CLR (Results 1 – 19 of 19) sorted by relevance

/linux/Documentation/admin-guide/
H A Dmono.rst5 (in the form of .exe files) without the need to use the mono CLR
11 1) You MUST FIRST install the Mono CLR support, either by downloading
21 Once the Mono CLR support has been installed, just check that
50 # Register support for .NET CLR binaries
53 # the Mono CLR runtime (usually /usr/local/bin/mono
55 echo ':CLR:M::MZ::/usr/bin/mono:' > /proc/sys/fs/binfmt_misc/register
/linux/drivers/clk/imx/
H A Dclk-pfd.c33 #define CLR 0x8 macro
40 writel_relaxed(1 << ((pfd->idx + 1) * 8 - 1), pfd->reg + CLR); in clk_pfd_enable()
100 writel_relaxed(0x3f << (pfd->idx * 8), pfd->reg + CLR); in clk_pfd_set_rate()
/linux/arch/arm/boot/compressed/
H A Dhead-sharpsl.S132 orr r3, r3, #0x0a @ SET CLR + FLWP
136 bic r3, r3, #2 @ CLR CLE
141 bic r3, r3, #4 @ CLR ALE
/linux/drivers/clk/mxs/
H A Dclk-pll.c47 writel_relaxed(1 << pll->power, pll->base + CLR); in clk_pll_unprepare()
54 writel_relaxed(1 << 31, pll->base + CLR); in clk_pll_enable()
H A Dclk-imx23.c52 writel_relaxed(1 << BP_CLKSEQ_BYPASS_SAIF, CLKSEQ + CLR); in clk_misc_init()
63 writel_relaxed(1 << BP_CLKSEQ_BYPASS_SSP, CLKSEQ + CLR); in clk_misc_init()
69 writel_relaxed(0x3f << BP_FRAC_IOFRAC, FRAC + CLR); in clk_misc_init()
H A Dclk-imx28.c73 writel_relaxed(0x3 << BP_SAIF_CLKMUX, DIGCTRL + CLR); in mxs_saif_clkmux_select()
90 writel_relaxed(0x3 << BP_CLKSEQ_BYPASS_SAIF0, CLKSEQ + CLR); in clk_misc_init()
110 writel_relaxed(0xf << BP_CLKSEQ_BYPASS_SSP0, CLKSEQ + CLR); in clk_misc_init()
H A Dclk.h15 #define CLR 0x8 macro
H A Dclk-ref.c35 writel_relaxed(1 << ((ref->idx + 1) * 8 - 1), ref->reg + CLR); in clk_ref_enable()
/linux/drivers/pwm/
H A Dpwm-mxs.c18 #define CLR 0x8 macro
71 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); in mxs_pwm_apply()
/linux/arch/arm/mach-rpc/
H A Dirq.c14 #define CLR 0x04 macro
132 writeb(mask, base + CLR); in iomd_irq_mask_ack()
/linux/drivers/gpu/drm/xe/
H A Dxe_tuning.c42 XE_RTP_ACTIONS(CLR(CCCHKNREG1, ENCOMPPERFFIX),
47 XE_RTP_ACTIONS(CLR(XE2LPM_CCCHKNREG1, ENCOMPPERFFIX),
H A Dxe_wa.c115 XE_RTP_ACTIONS(CLR(MISCCPCTL, DOP_CLOCK_GATE_RENDER_ENABLE))
141 XE_RTP_ACTIONS(CLR(SARB_CHICKEN1, COMP_CKN_IN))
175 XE_RTP_ACTIONS(CLR(MISCCPCTL, DOP_CLOCK_GATE_RENDER_ENABLE))
243 XE_RTP_ACTIONS(CLR(POWERGATE_ENABLE,
413 XE_RTP_ACTIONS(CLR(XEHP_HDC_CHICKEN0,
645 XE_RTP_ACTIONS(CLR(COMMON_SLICE_CHICKEN3,
H A Dxe_hw_engine.c448 XE_RTP_ACTIONS(CLR(RING_PSMI_CTL(0), in hw_engine_setup_default_state()
/linux/drivers/gpu/drm/imx/dcss/
H A Ddcss-dev.h16 #define CLR 0x08 macro
22 #define dcss_clr(v, c) writel((v), (c) + CLR)
/linux/drivers/pinctrl/freescale/
H A Dpinctrl-mxs.h13 #define CLR 0x8 macro
H A Dpinctrl-mxs.c296 writel(1 << shift, reg + CLR); in mxs_pinconf_group_set()
307 writel(1 << shift, reg + CLR); in mxs_pinconf_group_set()
/linux/drivers/gpu/drm/xe/tests/
H A Dxe_rtp_test.c211 XE_RTP_ACTIONS(CLR(REGULAR_REG1, REG_BIT(1)))
274 XE_RTP_ACTIONS(CLR(REGULAR_REG1, REG_GENMASK(1, 0)))
/linux/arch/arm64/net/
H A Dbpf_jit.h134 #define A64_STCLR(sf, Rn, Rs) A64_ST_OP(sf, Rn, Rs, CLR)
144 #define A64_LDCLRAL(sf, Rt, Rn, Rs) A64_LD_OP_AL(sf, Rt, Rn, Rs, CLR)
/linux/drivers/video/fbdev/
H A Dimsttfb.c51 CLR = 6, /* 0x18 */ enumerator
1015 write_reg_le32(par->dc_regs, CLR, bgc); in imsttfb_fillrect()