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Searched refs:CLK_VPP1_SVPP3_MDP_WROT (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt8195-vpp1.c39 GATE_VPP1_0(CLK_VPP1_SVPP3_MDP_WROT, "vpp1_svpp3_mdp_wrot", "top_vpp", 6),
H A Dclk-mt8188-vpp1.c40 GATE_VPP1_0(CLK_VPP1_SVPP3_MDP_WROT, "vpp1_svpp3_mdp_wrot", "top_vpp", 6),
/linux/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h446 #define CLK_VPP1_SVPP3_MDP_WROT 6 macro
H A Dmt8195-clk.h550 #define CLK_VPP1_SVPP3_MDP_WROT 6 macro