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Searched refs:CLK_VPP1_SVPP3_MDP_TDSHP (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt8195-vpp1.c75 GATE_VPP1_1(CLK_VPP1_SVPP3_MDP_TDSHP, "vpp1_svpp3_mdp_tdshp", "top_vpp", 9),
H A Dclk-mt8188-vpp1.c60 GATE_VPP1_0(CLK_VPP1_SVPP3_MDP_TDSHP, "vpp1_svpp3_mdp_tdshp", "top_vpp", 26),
/linux/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h466 #define CLK_VPP1_SVPP3_MDP_TDSHP 26 macro
H A Dmt8195-clk.h585 #define CLK_VPP1_SVPP3_MDP_TDSHP 41 macro
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi2459 clocks = <&vppsys1 CLK_VPP1_SVPP3_MDP_TDSHP>;