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Searched refs:CLK_VPP1_SVPP2_MDP_FG (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt8195-vpp1.c44 GATE_VPP1_0(CLK_VPP1_SVPP2_MDP_FG, "vpp1_svpp2_mdp_fg", "top_vpp", 11),
H A Dclk-mt8188-vpp1.c45 GATE_VPP1_0(CLK_VPP1_SVPP2_MDP_FG, "vpp1_svpp2_mdp_fg", "top_vpp", 11),
/linux/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h451 #define CLK_VPP1_SVPP2_MDP_FG 11 macro
H A Dmt8195-clk.h555 #define CLK_VPP1_SVPP2_MDP_FG 11 macro
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi2356 clocks = <&vppsys1 CLK_VPP1_SVPP2_MDP_FG>;