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Searched refs:CLK_VPP0_WARP1_MDP_DL_ASYNC (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt8195-vpp0.c86 GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC, "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
/linux/include/dt-bindings/clock/
H A Dmt8195-clk.h474 #define CLK_VPP0_WARP1_MDP_DL_ASYNC 41 macro