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Searched refs:CLK_VLP_CAMTG4 (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt8196-clock.h355 #define CLK_VLP_CAMTG4 22 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8196-vlpckgen.c517 MUX_GATE_HWV_FENC_CLR_SET_UPD(CLK_VLP_CAMTG4, "vlp_camtg4", vlp_camtg2_7_parents,