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Searched refs:CLK_TOP_UART0_SEL (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt8516-clk.h160 #define CLK_TOP_UART0_SEL 128 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8516.c365 MUX(CLK_TOP_UART0_SEL, "uart0_sel", uart0_parents,
H A Dclk-mt8167.c524 MUX(CLK_TOP_UART0_SEL, "uart0_sel", uart0_parents,