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Searched refs:CLK_TOP_SSUSB_XHCI_SEL (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h96 #define CLK_TOP_SSUSB_XHCI_SEL 86 macro
H A Dmt8192-clk.h47 #define CLK_TOP_SSUSB_XHCI_SEL 35 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c480 MUX_GATE_CLR_SET_UPD(CLK_TOP_SSUSB_XHCI_SEL, "ssusb_xhci_sel",
H A Dclk-mt8192.c630 MUX_GATE_CLR_SET_UPD(CLK_TOP_SSUSB_XHCI_SEL, "ssusb_xhci_sel",