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Searched refs:CLK_TOP_SPI1_SEL (Results 1 – 8 of 8) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h93 #define CLK_TOP_SPI1_SEL 83 macro
H A Dmt7622-clk.h78 #define CLK_TOP_SPI1_SEL 66 macro
H A Dmt2701-clk.h124 #define CLK_TOP_SPI1_SEL 113 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7622.c410 MUX_GATE(CLK_TOP_SPI1_SEL, "spi1_sel", spi1_parents,
H A Dclk-mt7629.c484 MUX_GATE(CLK_TOP_SPI1_SEL, "spi1_sel", spi1_parents,
H A Dclk-mt2701.c578 MUX_GATE(CLK_TOP_SPI1_SEL, "spi2_sel", spi_parents,
/linux/arch/arm/boot/dts/mediatek/
H A Dmt2701.dtsi403 <&topckgen CLK_TOP_SPI1_SEL>,
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622.dtsi591 <&topckgen CLK_TOP_SPI1_SEL>,