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Searched refs:CLK_TOP_SPI0_SEL (Results 1 – 8 of 8) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h92 #define CLK_TOP_SPI0_SEL 82 macro
H A Dmt7622-clk.h77 #define CLK_TOP_SPI0_SEL 65 macro
H A Dmt2701-clk.h97 #define CLK_TOP_SPI0_SEL 86 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7622.c408 MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi282 <&topckgen CLK_TOP_SPI0_SEL>,
H A Dmt2701.dtsi343 <&topckgen CLK_TOP_SPI0_SEL>,
H A Dmt7623.dtsi488 <&topckgen CLK_TOP_SPI0_SEL>,
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622.dtsi503 <&topckgen CLK_TOP_SPI0_SEL>,