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Searched refs:CLK_TOP_SGM_SBUS_0_SEL (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt7988-clk.h96 #define CLK_TOP_SGM_SBUS_0_SEL 68 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7988-topckgen.c192 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SGM_SBUS_0_SEL, "sgm_sbus_0_sel", usxgmii_sbus_0_parents,