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Searched refs:CLK_TOP_SGM_1_SEL (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt7988-clk.h97 #define CLK_TOP_SGM_1_SEL 69 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7988-topckgen.c194 MUX_GATE_CLR_SET_UPD(CLK_TOP_SGM_1_SEL, "sgm_1_sel", sgm_0_parents, 0x090, 0x094, 0x098, 24,