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Searched refs:CLK_TOP_SENINF1 (Results 1 – 8 of 8) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt6779-clk.h149 #define CLK_TOP_SENINF1 139 macro
H A Dmt8186-clk.h49 #define CLK_TOP_SENINF1 30 macro
H A Dmediatek,mt8188-clk.h60 #define CLK_TOP_SENINF1 49 macro
H A Dmt8195-clk.h66 #define CLK_TOP_SENINF1 54 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8186-topckgen.c584 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "top_seninf1",
H A Dclk-mt8188-topckgen.c1074 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "top_seninf1",
H A Dclk-mt8195-topckgen.c1005 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "top_seninf1",
H A Dclk-mt6779.c734 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "seninf1_sel",