Home
last modified time | relevance | path

Searched refs:CLK_TOP_PEXTP_P3_SEL (Results 1 – 2 of 2) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt7988-clk.h115 #define CLK_TOP_PEXTP_P3_SEL 87 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7988-topckgen.c235 MUX_GATE_CLR_SET_UPD(CLK_TOP_PEXTP_P3_SEL, "pextp_p3_sel", sspxtp_parents, 0x0e0, 0x0e4,