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Searched refs:CLK_TOP_P0_1MHZ (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h23 #define CLK_TOP_P0_1MHZ 13 macro
H A Dmt7622-clk.h25 #define CLK_TOP_P0_1MHZ 13 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7622.c267 FACTOR(CLK_TOP_P0_1MHZ, "p0_1mhz", "eth1pll", 1, 500),