Searched refs:CLK_TOP_NFIECC_SEL (Results 1 – 7 of 7) sorted by relevance
/linux/include/dt-bindings/clock/ |
H A D | mt8516-clk.h | 195 #define CLK_TOP_NFIECC_SEL 163 macro
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H A D | mediatek,mt8365-clk.h | 107 #define CLK_TOP_NFIECC_SEL 97 macro
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H A D | mt2712-clk.h | 161 #define CLK_TOP_NFIECC_SEL 130 macro
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/linux/drivers/clk/mediatek/ |
H A D | clk-mt8516.c | 435 MUX(CLK_TOP_NFIECC_SEL, "nfiecc_sel", nfiecc_parents,
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H A D | clk-mt8167.c | 624 MUX(CLK_TOP_NFIECC_SEL, "nfiecc_sel", nfiecc_parents,
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H A D | clk-mt2712.c | 695 MUX_GATE(CLK_TOP_NFIECC_SEL, "nfiecc_sel", nfiecc_parents, 0x0c0, 0, 3, 7),
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H A D | clk-mt8365.c | 510 MUX_GATE_CLR_SET_UPD(CLK_TOP_NFIECC_SEL, "nfiecc_sel", nfiecc_parents,
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