Searched refs:CLK_TOP_NFI2X_SEL (Results 1 – 6 of 6) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 106 #define CLK_TOP_NFI2X_SEL 96 macro
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| H A D | mt2712-clk.h | 153 #define CLK_TOP_NFI2X_SEL 122 macro
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| H A D | mt2701-clk.h | 111 #define CLK_TOP_NFI2X_SEL 100 macro
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt2712.c | 683 MUX_GATE(CLK_TOP_NFI2X_SEL, "nfi2x_sel", nfi2x_parents, 0x0a0, 0, 4, 7),
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| H A D | clk-mt8365.c | 508 MUX_GATE_CLR_SET_UPD(CLK_TOP_NFI2X_SEL, "nfi2x_sel", nfi2x_parents,
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| H A D | clk-mt2701.c | 541 MUX_GATE(CLK_TOP_NFI2X_SEL, "nfi2x_sel", nfi2x_parents,
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