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Searched refs:CLK_TOP_NETSYS_2X_SEL (Results 1 – 7 of 7) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt7986-clk.h69 #define CLK_TOP_NETSYS_2X_SEL 46 macro
H A Dmediatek,mt7981-clk.h109 #define CLK_TOP_NETSYS_2X_SEL 96 macro
H A Dmediatek,mt7988-clk.h60 #define CLK_TOP_NETSYS_2X_SEL 32 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7986-topckgen.c236 MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_2X_SEL, "netsys_2x_sel",
H A Dclk-mt7981-topckgen.c354 MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_2X_SEL, "netsys_2x_sel",
H A Dclk-mt7988-topckgen.c111 MUX_GATE_CLR_SET_UPD(CLK_TOP_NETSYS_2X_SEL, "netsys_2x_sel", netsys_2x_parents, 0x000,
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a.dtsi552 assigned-clocks = <&topckgen CLK_TOP_NETSYS_2X_SEL>,