Searched refs:CLK_TOP_NET1PLL_D5_D2 (Results 1 – 5 of 5) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| H A D | mt7986-clk.h | 41 #define CLK_TOP_NET1PLL_D5_D2 18 macro
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| H A D | mediatek,mt7988-clk.h | 45 #define CLK_TOP_NET1PLL_D5_D2 17 macro
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt7986-topckgen.c | 48 FACTOR(CLK_TOP_NET1PLL_D5_D2, "top_net1pll_d5_d2", "net1pll", 1, 10),
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| H A D | clk-mt7988-topckgen.c | 41 FACTOR(CLK_TOP_NET1PLL_D5_D2, "net1pll_d5_d2", "net1pll", 1, 10),
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt7986a.dtsi | 384 <&topckgen CLK_TOP_NET1PLL_D5_D2>;
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