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Searched refs:CLK_TOP_NET1PLL_D5 (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt7986-clk.h40 #define CLK_TOP_NET1PLL_D5 17 macro
H A Dmediatek,mt7988-clk.h44 #define CLK_TOP_NET1PLL_D5 16 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7986-topckgen.c47 FACTOR(CLK_TOP_NET1PLL_D5, "top_net1pll_d5", "net1pll", 1, 5),
H A Dclk-mt7988-topckgen.c40 FACTOR(CLK_TOP_NET1PLL_D5, "net1pll_d5", "net1pll", 1, 5),