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Searched refs:CLK_TOP_MSDC50_2_SEL (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt8365-clk.h84 #define CLK_TOP_MSDC50_2_SEL 74 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8365.c443 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MSDC50_2_SEL, "msdc50_2_sel",
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8365.dtsi685 clocks = <&topckgen CLK_TOP_MSDC50_2_SEL>,