/linux/include/dt-bindings/clock/ |
H A D | mt7986-clk.h | 32 #define CLK_TOP_MMPLL_D2 9 macro
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H A D | mt8135-clk.h | 25 #define CLK_TOP_MMPLL_D2 14 macro
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H A D | mt8516-clk.h | 62 #define CLK_TOP_MMPLL_D2 30 macro
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H A D | mediatek,mt7988-clk.h | 37 #define CLK_TOP_MMPLL_D2 9 macro
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H A D | mediatek,mt6795-clk.h | 44 #define CLK_TOP_MMPLL_D2 33 macro
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H A D | mt8173-clk.h | 46 #define CLK_TOP_MMPLL_D2 36 macro
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H A D | mt6765-clk.h | 69 #define CLK_TOP_MMPLL_D2 34 macro
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H A D | mediatek,mt8365-clk.h | 44 #define CLK_TOP_MMPLL_D2 34 macro
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H A D | mt2712-clk.h | 98 #define CLK_TOP_MMPLL_D2 67 macro
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H A D | mt8186-clk.h | 124 #define CLK_TOP_MMPLL_D2 105 macro
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H A D | mt2701-clk.h | 52 #define CLK_TOP_MMPLL_D2 42 macro
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/linux/drivers/clk/mediatek/ |
H A D | clk-mt7986-topckgen.c | 37 FACTOR(CLK_TOP_MMPLL_D2, "top_mmpll_d2", "mmpll", 1, 2),
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H A D | clk-mt7988-topckgen.c | 33 FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll", 1, 2),
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H A D | clk-mt6795-topckgen.c | 396 FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll", 1, 2),
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H A D | clk-mt8173-topckgen.c | 475 FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll", 1, 2),
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H A D | clk-mt8135.c | 40 FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll", 1, 2),
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H A D | clk-mt8186-topckgen.c | 59 FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll", 1, 2),
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H A D | clk-mt8516.c | 57 FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll", 1, 2),
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H A D | clk-mt8167.c | 60 FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll", 1, 2),
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H A D | clk-mt2712.c | 105 FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll_ck", 1, 2),
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H A D | clk-mt8365.c | 63 FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll", 1, 2),
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H A D | clk-mt6765.c | 119 FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll_ck", 1, 2),
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H A D | clk-mt2701.c | 102 FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll", 1, 2),
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