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Searched refs:CLK_TOP_HIF_SEL (Results 1 – 5 of 5) sorted by relevance

/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi98 clocks = <&topckgen CLK_TOP_HIF_SEL>;
100 assigned-clocks = <&topckgen CLK_TOP_HIF_SEL>;
321 <&topckgen CLK_TOP_HIF_SEL>;
389 <&topckgen CLK_TOP_HIF_SEL>;
/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h104 #define CLK_TOP_HIF_SEL 94 macro
H A Dmt7622-clk.h89 #define CLK_TOP_HIF_SEL 77 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7622.c438 MUX_GATE(CLK_TOP_HIF_SEL, "hif_sel", eth_parents,
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622.dtsi251 clocks = <&topckgen CLK_TOP_HIF_SEL>;