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Searched refs:CLK_TOP_HDCP_24M (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt8188-clk.h74 #define CLK_TOP_HDCP_24M 63 macro
H A Dmt8195-clk.h89 #define CLK_TOP_HDCP_24M 77 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt8188-topckgen.c1113 MUX_GATE_CLR_SET_UPD(CLK_TOP_HDCP_24M, "top_hdcp_24m",
H A Dclk-mt8195-topckgen.c1066 MUX_GATE_CLR_SET_UPD(CLK_TOP_HDCP_24M, "top_hdcp_24m",