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Searched refs:CLK_TOP_ETHER_50M_SEL (Results 1 – 3 of 3) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt2712-clk.h186 #define CLK_TOP_ETHER_50M_SEL 155 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt2712.c733 MUX_GATE(CLK_TOP_ETHER_50M_SEL, "ether_50m_sel", ether_50m_parents,
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi744 <&topckgen CLK_TOP_ETHER_50M_SEL>,
747 <&topckgen CLK_TOP_ETHER_50M_SEL>,