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Searched refs:CLK_TOP_EMMC_400M_SEL (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt7981-clk.h98 #define CLK_TOP_EMMC_400M_SEL 85 macro
H A Dmediatek,mt7988-clk.h69 #define CLK_TOP_EMMC_400M_SEL 41 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7981-topckgen.c314 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_EMMC_400M_SEL, "emmc_400m_sel",
H A Dclk-mt7988-topckgen.c131 MUX_GATE_CLR_SET_UPD(CLK_TOP_EMMC_400M_SEL, "emmc_400m_sel", emmc_400m_parents, 0x020,