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Searched refs:CLK_TOP_EMMC_250M_SEL (Results 1 – 5 of 5) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmt7986-clk.h57 #define CLK_TOP_EMMC_250M_SEL 34 macro
H A Dmediatek,mt7988-clk.h68 #define CLK_TOP_EMMC_250M_SEL 40 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7986-topckgen.c194 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_EMMC_250M_SEL, "emmc_250m_sel",
H A Dclk-mt7988-topckgen.c129 MUX_GATE_CLR_SET_UPD(CLK_TOP_EMMC_250M_SEL, "emmc_250m_sel", emmc_250m_parents, 0x020,
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a.dtsi382 <&topckgen CLK_TOP_EMMC_250M_SEL>;