CLK_TOP_DISP_PWM0 (reference) in projects: linux

50 #define CLK_TOP_DISP_PWM0			39  macro

1048 	MUX_GATE_CLR_SET_UPD(CLK_TOP_DISP_PWM0, "top_disp_pwm0",

1149 			clocks = <&topckgen CLK_TOP_DISP_PWM0>,

/linux/include/dt-bindings/clock/
H A D	mediatek,mt8188-clk.h	`50 #define CLK_TOP_DISP_PWM0 39 macro`
H A D	mt8195-clk.h	`54 #define CLK_TOP_DISP_PWM0 42 macro`
/linux/drivers/clk/mediatek/
H A D	clk-mt8188-topckgen.c	`1048 MUX_GATE_CLR_SET_UPD(CLK_TOP_DISP_PWM0, "top_disp_pwm0",`
H A D	clk-mt8195-topckgen.c	`978 MUX_GATE_CLR_SET_UPD(CLK_TOP_DISP_PWM0, "top_disp_pwm0",`
/linux/arch/arm64/boot/dts/mediatek/
H A D	mt8195.dtsi	`1149 clocks = <&topckgen CLK_TOP_DISP_PWM0>,`