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Searched refs:CLK_TOP_AUD_SEL (Results 1 – 4 of 4) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dmediatek,mt7981-clk.h114 #define CLK_TOP_AUD_SEL 101 macro
H A Dmediatek,mt7988-clk.h87 #define CLK_TOP_AUD_SEL 59 macro
/linux/drivers/clk/mediatek/
H A Dclk-mt7981-topckgen.c369 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_SEL, "aud_sel", aud_parents, 0x060,
H A Dclk-mt7988-topckgen.c172 MUX_GATE_CLR_SET_UPD(CLK_TOP_AUD_SEL, "aud_sel", aud_parents, 0x070, 0x074, 0x078, 8, 1, 15,